Circuit
Description
This circuit
senses a voltage change across a thermistor, and
switches a relay when the temperature reaches a
programmable point. The switch-point is
adjustable, and the test operator is to adjust
the threshold for a given temperature. For
this configuration, the operator must adjust R12
for the relay to switch at 3.8 volts.
There is some
logic on this board as well. Connector J1
contains all the input lines for the logic.
If there is a low on pin 4 of J1, LED D3 will
light. This same line feeds the
"D" input of the flip-flop U3.
Whenever the clock (pin 3, U3) goes high, the
value at "D" will be transferred to the
"Q" output (pin 4, J2). Pin 6 of J1 is
used to reset the flip-flop.
When pin 5 of J1
goes high, the voltage across capacitor C5 will
slowly fall. When this voltage reaches the
threshold of inverter U2, the output will go high
and the flip-flop will latch the value at
"D" onto "Q".
Interface
Configuration
In order to test
this PC board, an interface fixture must be
built. Often this interface can be a simple
cable, or it may be a "bed-of-nails"
type fixture. It depends on the mechanical
configuration of the unit to be tested, as well
as the extent of testing desired.
For this PC board,
we will use a simple interface "box"
that contains cables to plug into the board under
test (since it has two connectors), and two
pushbutton switches to allow control of the
FT-100a test from the interface box. (START/STOP
and WAIT/CONT).
The first step in
setting up for a test is to define the desired
input and output lines and how they are to be
controlled or measured. Below is a diagram
of the PC board connectors and the chosen I/O
lines to connect to each. Note that there
is a spring loaded test pin. This is to
allow access to one point that does not go to
either connector. The pin should be located
such that it will contact the PC board on pin 3
of U3. A wire with a test clip or any other
device that suits your particular needs could be
used instead of a spring test pin. Also
note that due to the somewhat limited I/O
requirements, the entire test interface can be
done using only one FT-100a I/O connector.
I/O
INTERFACE DESCRIPTION
|
Unit
under test
|
FT-100a
|
| J1 PIN 1 |
- |
+5 VOLT SUPPLY |
| J1 PIN 2 |
- |
AA9 (analog input
line) |
| J1 PIN 3 |
- |
AA1 (analog output
line) |
| J1 PIN 4 |
- |
LA1:1 (digital
output line) |
| J1 PIN 5 |
- |
LA1:2 (digital
output line) |
| J1 PIN 6 |
- |
LA1:3 (digital
output line) |
| J1 PIN 7 |
- |
-12 VOLT SUPPLY |
| J1 PIN 8 |
- |
+12 VOLT SUPPLY |
| J1 PIN 9 |
- |
GROUND (DC and
analog) |
|
|
|
| J2 PIN 1 |
- |
AA10 (analog input
line) |
| J2 PIN 2 |
- |
LA1:4 (digital
output line) |
| J2 PIN 3 |
- |
LA6:2 (digital input
line) |
| J2 PIN 4 |
- |
LA6:3 (digital input
line) |
| J2 PIN 5 |
- |
LA6:4 (digital input
line) |
|
|
|
| Test pin |
- |
LA6:1 |
Schematic
of Interface
|